cmos chip design
cmos analog design
cmos custom image sensor
cmos image sensor design
cmos custom IP design
Photo diodes I/V transfer carachteristic curve.
A pixel photo diode has a behaviour like a surrent source when diode is in reverse bias. This is the kind of behaviour we want from a photo diode, when designing a pixel.
The current source behaviour is suitable because we can have on photo diode terminals, a voltage difference as a fucntion of the exposure time or as a function of the exposed light.
In a more generic way, is a fucntion of the product, exposure time and light intensity.
The more time we expose the pixel photo diode, the more voltage it builds on its parasitic capacitance. In the other hand, the more light we allow pixel to be exposed, the more voltage difference we get during a fixed exposure time.
Next figure show the quandrant opperation for pixel photo diodes.
Note that, average photo current is linear with light. Light intensity is related with the generated photo current. The more photo current is generated, means the more light intensity photo diodes is being exposed to.
Note also that current varies slightly over the inversed voltage range, due to non ideal current source behaviour. However this effect is exagerated in the figure. In reality it looks like almost a flat transfer curve for a given generated photo current.
The I0 current is the so called Dark Current, where pixel exhibits a small current (Iph0) with no light hitting the pixel.
Photo diodes spectral response.
Every pixel, has its own spectral response, where some are made to be operated and be sensitive to near infra-red or infra-red (near IR, or IR) sprectrum, and others are made to operate and be sensitive to long wave IR spectrum for thermal images. Some others are made to be sensitive to visible light, for whatever appliaction might be needed, and even some are made for X-ray applications through scintillator materials.
Next figure depicts the typical spectral response of a photo diode sensitive to visible light.
These visible types photo diodes, have higher quantum efficinecy (QE) somewhere in the green colour range.
Anyway, reader must wonder at this moment how light is really converted into signal, current or voltage domain?
As said before, a photo diode when reversed biased, behaves like a current source, with output current as a linear function of incident light. Moreover, diode is implanted in a substrate, so has its inherent parasitic capacitance attched to it.
The light information is kept in the parasitic capacitance as a voltage signal. If we let the current source terminal of photo diode to discharge its parasitic capacitance from a known initial voltage, then after a specific time and a specific light intensity, we will get at the diode terminals, a voltage difference as a linear function of those time and light variables.
It is the sensed voltage that ends up to be light information. Now, what we do witht that voltage is a different subject. It's possible to drive it to off-chip as an analogue voltage. Then off-chip it shall be converted to digital domain. Or it can be converted already on-chip through a built-in ADC.
Pixel is an entity known as the photo diode plus readout electronics, which can be as simple as one transistor or more complex circuitry like a on-pixel driver (usually a source follower stage).
In general, there are 2 types of pixels on CMOS process design. One of the first ones to be developed, is the passive pixel. This type of pixel is made by a "regular" (non-pinned) photo diode plus an NMOS tranistor acting as a switch. Next figure depicts the passive pixel design.
The purpose of the switch is to transfer the charge accomulated over the exposure time onto a sample capacitor. This process is usually made through a charge trans-impedance amplifiers (CTIA).
Figure below, shows how passive pixel must be opperated in area scan sensor application. It's not considered at the bus side, the SF Vgs drop voltage.
The other type of pixel is the so called active pixel (APS). In this type of pixel, not only the switch is present, to select a specific pixel amongst other pixels, but also a reset switch to pre-charge the photo diode to a known starting voltage and a source follower device.
This ends up into a known 3T active pixel type. However, versions of 4T, 5T and many more, were developed over time in order to have other features, like global shutter opperation (5T), besides rolling shutter opperation (3T and 4T).
3T non-pinned pixel.
This pixel is known to be a pixel mostly used as a large pixel (for x-ray applications, for example) and large FW capacitance.
The reason is that this kind of pixel is known to be "noisy" pixels, in the sense that we cannot get reed of KT/C reset noise. It's not possible to do CDS operation over such pixel, in area scan rolling shutter devices.
So, if it's not possible to cancel KT/C noise, at least let noise be as small as possible. That is only possible with big full well capacitance and large pixels.
In fact we could opperate with it in CDS mode, but that is only feasible on line scan sensors, which only has one pixel in a row. In line scan sensors, signal sampling is made after exposure time and its value is inherently correlated with reset value right after pixel is exposed.
Next figure depicts the active 3T pixel design.
Basically, pixel is made of a non-pinned Nwell/Psub diode.
Figure below, shows how 3T pixel must be opperated in area scan sensor application. Not considered at the bus side, the SF Vgs drop voltage.
Pay attention that it's needed to sample pixel correspondent values (both reset and signal values) from the bus. The light information is contained in the difference from reset voltage and signal voltage after exposure time. Note alos that there are variations of the 3T pixel type, such as pixels with partially pinned diodes.
4T pinned pixel.
This pixel is knwon to be used in low noise applications and/or cases where small pixel are needed. They are used in situations where pixels are small and inherently KT/C reset noise is big. But since it can be subjected to CDS operation, reset noise can be cancelled.
CDS is only achievable on this pixel because transfer gate is burried and voltage across both diode and floating diffusion capacitances does not equalise as would be expected from laws of circuits, but the charge on diode is fully tranfered to floating diffusion capacitance.
Since charge is fully tranfered, then there is no electron left on diode capacitance, therefore no noise is generated. Next figure depicts the active 4T pixel design.
Basically, pixel is made of a pinned diode. As a consequence, pinning voltages and other typical things from such pixel, much be understood. Below pinning voltage, diode capancitance changes and makes pixel non linear with light. Same happens with 3T pixel but at higher diode voltages, meaning that 3T pixel has less linear range compared with 4T pixels.
Figure below, shows how 4T pixel must be opperated in area scan sensor application. Not considered at the bus side, the SF Vgs drop voltage.
Sampling must be done, after ending Reset phase and before Tx gate triggering, in order to get the noise information. When doing second sample, inside Tx triggering phase, the sampled signal is refered to reset voltage plus its generated switch operation noise.
To pre-charge photo diodes in order to start a new exposure, it can be done in parallel with other pixel access. The pixel row addressing logic must handle with this features. In this way, integration time is defined by the time phodo diode pre-charge occurs and new access is made for pixel readout.
Note that, for high pixel array density, there are variations of the 4T pixel array, such as shared pixels. They share reset transistor for all pixels involved in this scheme, leading to 1.75T pixels (in case of 4 shared pixels) and stuff like that.
This reduces effective area per pixel, and makes possible to integrate more pixels in same size.
This type of pixels is known to be used in global shutter applications. Similarly with 3T pixels, they are noisy because KT/C reset noise cannot be cancelled. No correlated double sampling (CDS) operation can be trully made, only double sampling (DS) can be done to remove FPN.
Next figure depicts the active 5T pixel design.
This type of pixel has specific inherent features like, shutter efficiency, image lag, amongst others. These are important features from 5T pixel.
Figure below, shows how 5T pixel must be opperated in area scan sensor application. Not considered at the bus side, the SF Vgs drop voltage.
Note that pixel access is done similarly with 3T pixel type, with exception of global Rx and Tx gates.
Rx and Tx gates triggering defines the exposure time. They can be opperated in pipeline mode with buses access, although figure doesn't shows that.
All reset switches during exposure time, can be always ON, or just ON during a brief period of time before Tx gate triggering, in order to reset floating diffusion capacitance before transfer accomulated charge from diode capacitance.
This makes scene shot capture possible, and effect independent from readout and AD conversion time. There is other types of pixels, such as 6T, 7T, 8T, etc. but is out of the blog scope to speak about them.
This effect has to do with strong impinging light in the pixel, such that photo diode terminal reaches zero volt and goes beyond of it, making electrons to flow into adjacent pixels.
The prevent measure is include a "source follower" tied to photo diode terminal with a tunable gate voltage. In regular pixel operation, this device does nothing on it, but if pixel is too much illuminated or the exposure time is long enough, this prevents the photo diode to discharge down to zero volt and below it, avoiding blooming effect.
The disadvantage is that pixel fill factor comes reduced, reducing conversion gain (CvG) and quantum efficiency (QE).
Pixel bus coupling effects.
Layout coupling from adjacent pixels or adjacent analogue readout electronics, makes this an important issue to look at during CIS design and layout phase. Proper simulations with extracted parasitics effects should be done in order to avoid coupling between pixel signals.
To get a quantitative value of such coupling effect, extraction should be made from a reduced portion of layout (ex. including 4, 5 or 6 columns), in specific "illumination" conditions.
Lets consider a 4 column case. Illumination cases like, 0000, 0001, 0010, 0100, 1000, 0111, 1011, 1101, 1110 and 1111@50% light.
The first one (0000) is intended to have an idea how much charge injection and maybe, clock feed-through effect, reset switch produces, and FPN.
The cases 0001, 0010, 0100, 1000, 0111, 1011, 1101, 1110 is intended to check how much banding effect will be generated.
Finally the last case (1111@50%light) is intended to check how much PRNU will be generated.
Once layout reaches the target specs, then this issue can be closed.
cmos chip design
cmos analog design
cmos custom image sensor
cmos image sensor design
cmos custom IP design